Dsp Implementation Of The Double-precision Floating-point Chaotic Pseudo-random Sequence Generator

In modern engineering practice, the pseudo-random sequence (PRS) has been widely applied in many fields such as information security, digital communications, cryptography, automation. With the fast development of information technology, random sequence generators (RSGs) have been required more. How to generate high quality PRS is a wide range of topical issues which catchs world wide attentions of institutions and scholars. Due to the properties of chaotic system, such as extreme sensitive dependence on their initial conditions and control parameters, wide frequency spectrum and noise-like, it provides a good research model for generating high-performance PRS. In this dissertation, a method of designing Pseudo-Random Sequence Generator (PRSG) based on Tangent-Delay Ellipse Reflecting Cavity map System (TD-ERCS) and the universal algorithm transforming chaotic sequence into uniform pseudo-random sequenc is designed. The PRSG by using high performance 32-bit floating-point digital signal processors(DSPs) realized which conform to the IEEE754 double-precision floating-point standard. By employing USB2.0 transfer protocol in the communication between pc and DSPs,the pre-study on the problem of limited transmission speed is resolved. An application software is devised in VC++6.0, providing a man-machine interface that we can set the initial value and save the sequence fastly and conveniently. According to the criterion of PRS published by National Institute of Standards and Technology (NIST), test results show that the PRSG achieve the expected effect. It has done a very good pre-authentication for the hardware implement of chaos PRSG (CPRSG).