Study And Implementation Of RSA Cryptography With Asynchronous Micropipeline

With the rapid development of network technology and computer hardware,the information related has become main trend.Accompany by the increasing of the informatization,the information security also has higher requirements,of which the cryptography has become the core of information-based social security technologies.At present,the industry widely uses the RSA public key cryptosystem recommended by ISO to ensure information security.The core of the RSA algorithm of which key-length is variable is the modular exponentiation of large numbers.In this thesis,we analyze the basic theory and principle of RSA algorithm,and deeply study the structure of Montgomery modular exponentiation algorithm,CIOS modular multiplication algorithm and circular algorithm.For the implementation of the algorithm,an innovative ideas of asynchronous circuit,which utilizes some better characteristics in the power,performance,electromagnetic interference,is adopted to design a high-performance system.We also explore a novel design method of asynchronous micro-pipeline and conduct in-depth research on the 2-phase dual-rail encoding protocol and the 4-phase dual-rail encoding protocol,Muller CElement and Click unit.The asynchronous micropipeline control structure with Click technology is used to control different modules of RSA algorithm,and realize an asynchronous RSA cryptographic algorithm finally.Since the DPA attacks can easily break the conventional RSA algorithm implementation circuit,and the clock mechanism can only increase the difficulty of DPA attacks,but can not eradicate this harm.In this thesis we adopt the asynchronous micropipeline based data path as an implementation to eliminate the clock mechanism and then prevent DPA attacks effectively.We also debug and verify our 1024-bit RSA cryptography algorithm on the Xilinx 7 series FPGA(XCV485T-1762-2).