Research And Design Of Multi-bit Quantized Sigma-Delta Analog-to-Digital Converter

High-performance analog-to-digital converter is one of the research hotspots in recent years.Due to the high accuracy of the Sigma-Delta ADC,its application field has been continuously expanded.Typical Sigma-Delta ADCs are implemented by Sigma-Delta modulators and downsampling digital filter.The sigma-delta converter can push low-frequency noise to the high-frequency area and the digital filter can filter high-frequency noise to achieve higher accuracy by using oversampling technology and noise shaping technology.The typical Sigma-Delta converter has a low conversion speed,which greatly limits the application of the Sigma-Delta converter.The update rate of the Sigma-Delta converter can be effectively improved with a multi-bit quantization technique used in the Sigma-Delta modulator.However,the use of multi-bit quantization techniques causes nonlinear problems as well as difficulties in circuit design.This thesis mainly studies the design method and circuit implementation technology of multi-bit quantization Sigma-Delta ADC,and completes a relatively whole design process by theory analysis,modeling and simulation,modulator circuit design,downsampling digital filter design,calibration algorithm implementation and mixed signal simulation.The Sigma-Delta Modulator has been designed with a 2-1MASH structure.The modeling and simulation with Matlab has determined that the number of quantizer bits is three.At the same time,the rationality of error elimination logic is verified.The third-order noise shaping effect is achieved under the premise of ensuring stability.A DWA algorithm is added to the DAC control logic to shape the mismatch in order to solve the nonlinear problem caused by multi-bit quantization,since the modulator uses a multi-bit quantization technique.The circuit design is implemented by using a 0.35 ?m process,and the modulator sampling rate is 500 KHz.The analog circuit is simulated by Hspice,and the digital circuit is simulated by Modelsim.ADMS is used in overall circuit for mixed-signal simulation.The performance of each part of the circuit meets the design requirements.Two working modes are designed to extend the application range of converter.The digital part can implement filters of different types and orders depending on the mode.The modulator consumes less than 765?W and the digital filter is configured as a cascade of third-order CIC and averaging filter when the second-order Sigma-Delta modulator is used alone,under which circumstances the oversampling rate is 64,the corresponding update rate is 7.8125 KHz,and the precision is 16 bits.The modulator consumes less than 1.035 mW and the digital filter is configured as a cascade of fourth-order CIC and averaging filter when the complete MASH structure of Sigma-Delta modulator is used,under which circumstances the oversampling rate is 25,the corresponding update rate reaches 20 KHz,and the accuracy reaches 14 bits.The overall power consumption of the Sigma-Delta converter is less than 1.8mW when a MASH structure modulator is used and the filter is fourth-order under the supplying voltage is 3.3V.