The Design Of A Fourth-order MASH Sigma-Delta Modulate

Digital silicon gyro interface circuit in the military field or in daily life are occupying a very important position,and nature of the continuous physical acquisition into a more easy to operate discrete value is inseparable from ADC.The Sigma-Delta modulator plays a important role in ADC since it decides the converting resolution or even the precision of the whole system.The Harbin University of Technology had been committed to the research for gyroscope interface circuit.This paper will design a 2-1-1MASH Sigma-Delta modulator.Based on the research of MASH modulator at home and abroad,this paper analyzes the working principle of the modulator,the characteristics of different structures and makes a systematic modeling and simulation analysis of the MASH modulator by Matlab,finally determines the design system structure.Furthermore,this paper also discuss the non-ideal factors and find out the relationship between it and design results.Besides,non-ideal models were built and some simulations also were done to verify the effectiveness of analysis.Based on the models for system,each of the circuit design is made in standard0.35 um 5V CMOS process.Then the proposed sigma-delta modulator is simulated under the circumstance of spectre in Cadence.This design selects the fully differential dual reference voltage of the switching capacitor structure which can make a good suppression of noise.Moreover,the design of the quantizer,MOS complementary switch,clock circuit,and digital cancellation logic is also completed.After analog and digital part of the function meet the design requirements,simulating under the circumstance of spectreVerilog in Cadence.Finally the SNDR of MASH modulator is 103.86 dB,ENOB is 16.96 bits with 2.56 MHz sampling frequency and 10 KHz input signal bandwidth.The analog layout is drawn in the use of 0.35 um CMOS process.The area of the layout is estimated as2?um13952736.The SNDR of system is 99.64 dB,ENOB is16.26 bits.