With the development of modern indust rial technology,the integration in digital circuit has been increasing continually.The number of intellectual property(IP)cores that integrated on system-on-a-chip(SoC)has been increasing,and it has more complicated function.In order to keep the high of fault coverage during the test,the increasing chip complexity cause a substantial increasing in test data volume.Then increased of the automatic test equipment's(ATE's)storage capacity and bandwidth requirements,and cause longer test application time,larger test power.Therefore,reducing test data volume is a hot research spot in SoC test.In these studies,the test data compression is an effective method to solve the large amount of test data and test time.This thesis focus on SoC test vector compression,the innovative works are as follows:(1)A test vector compression method for multiple scan chain based on mirrorsymmetrical reference slices is proposed.This method uses two mutually mirrorsymmetrical reference slices comparison with sca n slice with compatibility,which improves the compression ratio compared to a single reference slice.If a scan slice is compatible with one of the reference slices,it can be encoded to a few bits,and be loaded to scan chain in parallel.Otherwise,the scan slice will replace the reference slice.A greedy compatibility strategy is proposed to solve the issue that the scan slice and reference slice have more compatible relationship.It can further improve the test compression ratio to determine the code w ord according to the different compatibility frequency statistics situations by Huffman code theory.(2)A test vector broadcasting compression method based on transform coding is proposed.This method applies transform coding to the broadcast-scan-based compression method,which decomposes an original test set to a prominent component set and a residue set using Hadamard transform.The prominent component be selected by the column maximum matching strategy,that allowing m ore residue component to satisfy broadcast conditions.The experimental results show that on the basis of increasing the hardware cost,the number of broadcasting vectors is improved.Not only the test compression ratio is improved,but also the test time is reduced.For the ISCAS'89 benchmark circuits using the Min Test set,the experimental results show that the two methods proposed in this thesis achieve an effective compression ratio,and reduce the test application time and test power. |