| In the process of executing user program in PLC, information and data in outputimage memory need to be read/written frequently. For processing instructions forinformation don't existed in ARM microprocessor, special programs should be added toprocess information, high-speed information output operations and data reading/writingoperations in output image memory according four bits composing a group. Thus, ARMmicroprocessor need to execute multiple instructions in the process of reading/writing inoutput image memory, the speed of executing PLC user program is impacted.In this topic, FPGA is used to design hardware connection circuit of PLC outputcontroller, and the controlling problem of output image storage and output port in PLC aresolved. First, an information output control core and a data output control core aredeveloped. Then the PLC output controller is designed. Research has achieved thefollowing results:(1) The program's formulating for information output control core and data outputcontrol core are completed, including the overall structure, operation command, format ofcommand word, working sequence, function modules and so on.(2) The information output control core is designed. The control core is consisted ofthe command control, write information storage, information read/write control andhigh-speed output information, output image memory controller, pulse distributor andPLC output port with the output latch in total of seven function modules. When commandand information are got by the core, the internal sequence is started to completeinformation read/write and high-speed output operations independently. Information'swrite/read operations are completed according to the high four Y number and low two Ynumber.(3) The data output control core is designed. The control core is consisted ofcommand control, data storage, data transmission control, PLC output image storage, datalatch and output port, pulse generator in total of six function modules. When commandand information are got by the core, the internal sequence is started to complete the dataread/write or output operations. Four bits composing a group to addressing to read/write inthe output image memory is completed according to the high four Y number and Y values.(4) The PLC output controller is designed on the basis of information output controlcore and data output control core, It is composed of nine functional modules, all functionsof two output control core are possessed. The data bus control mode is designed.(5) The simulation and experimental validation plan formulation are completed,function simulation, timing simulation and test are completed on Actel'sProASIC3A3P1000chip, The feasibility of the PLC output control core and controller based onFPGA from function to hardware are verified. |
