Research On Key Technology Of V-Band Multi-Function Transceiver Based On SiGe BiCMOS Process

V band high rate transceiver chip can be widely used in two aspects of military and civil applications.In military area,the V band transceiver chip can be applied to chirp radar,for example,the missile fuze can get the location,distance and velocity of the target by sending and receiving signals,and then detonate the warhead in suitable position.In civilian applications,the world has opened several GHz bands around 60 GHz,which can be used for short distance personal local high speed communications and point to point communication applications.At present,V band high-speed transceiver chips are developing towards high speed,high integration and low cost.This paper points out that the SiGe BiCMOS process,as the better choice of transceiver chip,is a compromise process considering cost,performance and integration after analyzing various MMIC manufacturing process.Two typical structure of the transceiver chip is analyzed,and three key devices in transceiver chip are studied and designed:Based on the GF(Global Foundry)130nm SiGe BiCMOS process,a 2-stage common emitter low noise amplifier with working frequency of 58~62GHz was designed by minimum noise matching technology and two stage gain compensation method.The layout simulation results are: within the operation frequency,the noise figure is less than 5.53 dB,the gain is between 11.8 and 12.3dB,and the gain flatness is less than ± 0.3d B.The input P-1dB is-11.46 dB.S11 and S22 are less than-12.9dB and-18.1dB,respectively.Based on the GF 130 nm SiGe BiCMOS process,a zero-frequency downconverter mixer was designed using a balun with a Gilbert cell structure and an up-down coupled structure.The mixer layout simulation result is: the mixer realizes the frequency conversion from 58~62GHz to 1~5MHz,the conversion gain is 10.47 dB to 10.54 dB,the noise figure is 14.2dB,and the local oscillator and RF port isolation Greater than 34 dB,the input P-1dB power is-5.26 d Bm.Based on the IHP SG25 SiGe BiCMOS process,a DC-to-10 GHz IF amplifier was designed using eight parallel-connected cascode distributed amplification structures.The layout simulation results show that the amplifier gain is between 11.99 dB and 12.64 dB in the operating frequency band,and the gain is flat.The degree is less than ±0.5dB,the saturated output power is greater than 24 dBm,and the output P-1dB is greater than 22 dBm.