Research Of Ka-Band Transceiver Chip Key Technology Based On SiGe Process

With active phased array widely used in modern radar and communication system,the cost,power consumption and volume of phased array system become more and more important.Transceiver chip in phased array system determined the performance of the system,and occupied about 45% of the cost.?-? compound semiconductor with the advantages of high frequency,high power,low noise is the mainstream process in transceiver chip.But the cost of it is also high and it's hard to integrate with baseband digital module.Though the performance of Si or SiGe process is no such good as III-V compound semiconductor,it's more It has a great advantage in cost and integration.Moreover,SiGe is no worse than GaAs in frequency characteristics.At present,the use of Si or SiGe process to design highly integrated phased array on-chip systems is also a development trend at home and abroad.This article presents a Ka-band transceiver,and research of key technologies in it.Specific work as follows:1,In the transceiver chip system design,various architectures are compared,the cell module indicators are allocated,the SiGe process is introduced,and various on-chip isolation technologies are explored.2,A miniaturized single-pole double-throw switch is designed with 3dB insertion loss and about 30 dB isolation.A 5-bit digital attenuator designed for full-temperature(-55°C~125°C)operation is designed.The attenuator is characterized by temperature compensation and phase correction.The RMS attenuation error is less than 0.22 dB at room temperature,and the worst error is 0.43 dB at low temperature,All RMS phase shift error are less than 5.6°.3,Based on the SiGe HBT circuit model,the circuit characteristics and temperature characteristics of the cascode structure in the millimeter wave band are calculated and analyzed.Based on this,a compensation amplifier,a low noise amplifier,and a power amplifier are designed.In order to solve the problem of various of amplifier performance in different temperatures,a temperature compensated bias circuit including a current source,an asymmetric differential pair PTAT voltage generation circuit,and an LDO module are also designed.Low-noise amplifiers take into account both noise and linearity.At 33 GHz to 37 GHz at room temperature,the noise figure is less than 3.76 dB,and the input 1 d B compression point is-10.3 dBm.The power amplifier gain is about 26 dB,and the output 1dB compression point is 10.9dBm.4,The system simulation results of the transceiver chip and the measured results of the digital attenuator at room temperature,-55? and 125? are given.At 33 GHz ~ 37 GHz,the system after the simulation results: the gain greater than 13.6dB,noise figure is less than 10.4dB,input 1dB compression point is about-14.1dBm in receive mode;the gain is greater than 14.1dB,output 1dB compression point is about 6.8dBm in transmit mode.The RMS attenuation error is less than 0.26 dB@room temperature,less than 0.26dB@-55?,less than 0.45dB@125?.And the RMS error of the additional phase shift is less than 5.5°@room temperature,less than 8.5°@-55?,less than 2.4°@125?.