| In modern electronic industry, analog-to-digital converter is a bridge between the reality of the analog world and digital processing system, whose applications have been deep in the industry. The next important challenge is how to test the ADC parameters, especially integral-nonlinearity (INL). The standard test method is mainly suitable for middle and low resolution ADC, while for the high-resolution ADC, which faces the limitations of high request of signal source and sampling points. Therefore, in the semiconductor testing industry, exploring a test method for high-resolution ADC INL has become a hot spot of the recent research.This paper provides a testing ADC method based on the SEIR structure. It builds the SEIR test structure first. After the collecting two groups digital codes with only fixed deviation, algorithm will select Fourier coefficients to directly represent the INL curve. Around relationship of the fixed deviation and that the property of nonlinear part does not vary under the same test environment, it uses the least square estimation (LS) method to find out the set of coefficients. To reflect the small changes of the INL curve, the two output digital code is divided into segments, which enhances identification small parts. Each INL sub-curve contains a set of Fourier coefficients, and deal with the second part repeatedly. By processing the continuous, it will obtain the entire INL curve, which also improves the total testing precision.Based on the algorithm, this paper carries out a series of simulation by MATLAB software, designs 14bit ADC and 10bit DAC hardware circuit boards and sets up a test system, common to verify its validity. The test result shows, the INL of the standard histogram method ranges from-1.41LSB to 1.48LSB; when the proposed method selects 20 windows and 12 Fourier coefficients with 10 bit input signal, the INL ranges from-1.01LSB to 1.22LSB. The max error of INL precision is 0.92 LSB. |
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