Bandwidth Enhancement Of Optical Receiver Front-End Circuit Based On Standard CMOS Technology

With the explosive growth of data traffic,the electrical interconnection could not meet the strict requirements,and the optical interconnection was proposed to solve this problem.On the other hand,with the continuous scaling of semiconductor technology,the performance of silicon-based CMOS circuit was significantly improved.Due to the cost-effective performance with a friendly integration scheme,high speed optoelectronic integrated circuits?OEICs?based on CMOS technology have been widely explored.As a critical block in optical receiver,the transimpedance amplifier?TIA?has a direct impact on the performance of entire optical receiver system.Therefore,the design of high performance TIA become one of the hot issues in the field of integrated optoelectronics.In this thesis,three different TIAs and a whole optical receiver front-end circuit are designed based on the regulated cascode?RGC?configuration,and they are simulated and implemented in UMC 0.18?m CMOS process.The main contents are as follows:Firstly,a novel transimpedance amplifier was proposed,in which a bias network and a T-passive matching network were introduced.The simulation results demonstrated that our TIA has a transimpedance gain of 51 dB?and a-3 dB bandwidth of 14 GHz with a input capacitance of 0.3 pF.The average equivalent input noise current spectral density is about 13 pA/?Hz within-3 dB bandwidth.Secondly,a low noise differential cross-coupled transimpedance amplifier was designed.An auxiliary amplifier constructed by two-stage common-source topology,a ladder passive matching network and optimized circuit parameters were adopted to improve the performance of bandwidth and noise.The measured results indicated that the fabricated TIA with a photodetector capacitance of 300 pF has a transimpedance gain of 61.8 dB?and a-3 dB bandwidth of 2.2 GHz,and the average input-referred noise current spectral density is only 9 pA/?Hz.The eye pattern measurement shown that a data rate of 2.5 Gb/s was successfully achieved.The chip consumes 43mW DC power under 1.8V supply voltage and occupies an area of 1×1mm².Thirdly,a broadband transimpedance amplifier was designed and analyzed with L-matching network and cascode amplifier.A novel single-to-differential amplifier was also proposed to simplify the following limiting amplifier?LA?design and increase the immunity of common-mode noise.The measured transimpedance gain is 61 dB?with a-3 dB bandwidth of 8.1 GHz.The average equivalent input noise current spectral density is 18.5 pA/?Hz.The chip consumes 68 mW DC power under 1.8 V and occupies the area of 0.9 mm².Finally,a whole optical receiver front-end circuit was proposed,which consisted of a broadband TIA designed in the above section,a limiting amplifier?LA?with third-order interleaving active feedback and a F_t doubler Buffer.The simulation results shown that the optical receiver front-end has a transimpedance gain of 94.5dB?with a-3dB bandwidth of 9.5GHz,and the corresponding noise current spectral density is 26.3 pA/?Hz.Based on the analysis of recent progress of optical receiver,several optical receiver front-end circuits were analyzed and designed in this thesis.The obtained results provide a guidance for the further study of monolithic optical receiver.