15Gb/s CMOS Monolithic Parallel Front-End Amplifier For Optical Receiver Design

Optical communication is a mark of human world stepping into information society. Using VSR (Very Short Range) technology can replace expensive serial optical transmission technology with low-cost parallel technology. Now, VSR technology attracts a lot of operators, it is internationally standardized.The object of this project is to design a 15 Gb/s CMOS monolithic parallel front-end amplifier for optical receiver. There are 12 parallel amplifier circuits working for the system; each circuit must work on the input bit rate of 1.25 Gb/s. The circuit is fabricated with TSMC 0.18μm CMOS technology. This circuit is integrated with 12 parallel photo detectors array in the same IC.The front-end amplifier for optical receiver is made up of two important circuits: preamplifier and main amplifier. Preamplifier is employed for amplifying optoelectronic current impulse sensed by photo detectors into certain amplitude of voltage signal. In this project, a common-source transimpedance amplifier (TIA) is introduced as preamplifier. We will perform noise analysis of TIA in this paper, and analysis results will be verified in simulation. Main amplifier is used for amplifying the output signal of preamplifier into digital voltage level. The limiting amplifier is adopted as the main amplifier. The broadband units of limiting amplifier are implemented in improved Cherry-Hooper structure, which can acquire high gain-bandwidth product.Layout is the physical accomplishment of circuit diagram. The high-speed CMOS layout design technique is depicted in detail. With deep N-well isolation and guard-ring protection realized in TSMC 0.18μm CMOS process, we can acquire good isolation for parallel channels in one chip, reducing the cross talk of each channels at the same time. We have designed the layout of a single-channel amplifier and 12-channels array. After fabrication, we tested two chips and obtain good results.In this paper, we firstly introduce the knowledge about system and optical receiver; subsequently we describe the design procedures and test results of these circuits. The measure results of the chipset validate our design specification.