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Implementation Of Data Processing Based On PCI-Exptess Interface

Posted on:2013-11-26Degree:MasterType:Thesis
Country:ChinaCandidate:Z Y ZhangFull Text:PDF
GTID:2248330371459418Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As the latest bus and interface standard, PCIE (PCI-Express) has gradually become the mainstream as it can reach10GB/s and also there is considerable potential for the development. In this thesis, the digital down converter is designed and implemented on FPGA platform in order to satisfy the requirements of high-speed acquisition system based on PCIE interface.Digital down converter is a kind of technology which can move the IF signal to the zero-IF signal, as well as decrease the signal rate and filter the harmonic wave. Digital down converter is operated after the analog input signal goes through the ADC sampling device, and before the follow-up processing of the digital signal. This technology is the core of software radio and the most important part. As the input signal rate is really high, a lot of pressure to the entire software radio system will be caused if the input signal rate is not processed. Therefore, in this thesis, the structure and algorithm of each digital down converter module is compared and analyzed, also the optimal structure and algorithm of each module is put forward, then the circuit implementation and verification are done on FPGA to verify the designs.The main contents of the thesis are as follow:1, First of all, the basic theory and structure of digital down converter, as well as the look-up table, CORDIC algorithm, distributed algorithms and the other key algorithms involved in the completion of digital signal processing at all levels are introduced and analyzed.2, In this thesis, the algorithms and structures of NCO, CIC, HB and FIR are analyzed and compared, the classical structure is improved and validated through the simulation program.; the digital mixer module achievement based on the LUC and CORDIC algorithm are compared; the resource consumption and implementation feasibility of the designed HB filter’s general, transpose, multiplexing and folded structure are compared; the general structure of FIR filter and the one improved by distribute algorithm are compared. Finally, the optimal modules are combined into the entire digital down converter system.3, The digital conversion system test is completed on the existing hardware platform, and the final test results validate the correctness and effectiveness of the wideband digital down converter this design.
Keywords/Search Tags:Digital down converter, CIC filter, HB filter, FIR filter, CORDIC, Distributed arithmetic, FPGA
PDF Full Text Request
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