Design Of Low-Power And High-Resolution SAR ADC

Modular mixed-signal system has always been a very important part of electronic technology,and it is also the indispensable link between analog signal and digital high-speed processing system in the nature.With the rapid development of modern electronic technology,mobile portable electronic equipment has participated in all aspects of people's lives.However,due to the constraint of power supply equipment such as battery,the power consumption of the electronic equipment has remained the problem firstly considered by designers.In the meanwhile,with the continuous improve of people's requirements on the performance of its various aspects,the performance of the modular mixed-signal system applied in it has also been improved.As the most core component of modular mixed-signal system,the performance of Analog to digital convert(ADC)directly determines the performance of the system that uses it.In this paper,the characteristics of various types of ADC are compared based on the harsh requirements of mobile portable equipment on the power consumption of ADC,and a 10bit Successive Approximation Register(SAR)ADC is designed and tested.In order to ensure the requirement of low power consumption on ADC,bottom plate sampling of capacitance is adopted to split structures such as capacitor array and dynamic latch comparator circuit.According to the trend of higher and higher requirement on ADC performance,technologies such as split capacitor and analog foreground calibration are adopted to ensure the precision of ADC.The ADC circuit is implemented in 0.18?m CMOS process technology.The total area of the chip is1?1mm~2,and the area of the core is585?525?m~2.The test results show:under the condition of 1.8V power supply,the input signal is 1MHz,the sampling frequency is 2MHz,the SNDR obtained is 50.6486dB,SNR is 52.4149dB,ENOB is8.121bit,and power consumption is 370?W.