Real-time Image Preprocessing System Design Based On Spartan-6 Series FPGA

In our daily life and work,people always need to obtain external information through visual images;There are also many occasions need to collect image data for real-time processing in industry control.Most of the algorithms used in image processing are very large,software processing system cannot meet the requirements.While FPGA has the advantages of running fast,programmable,stable,good real-time performance and so on,so it is very suitable for preprocessing the image with simple algorithm.Therefore,to design a real-time image processing system based on FPGA has a profound market value.The main contents of this thesis include three parts,the first part is the design of real-time image preprocessing system.The system is composed of four modules,it can complete the RGB565 format image capture,decoding,preprocessing,storage and display.Using Spartan6 series FPGA chip in hardware,which has rich sources.Logic circuit design is implemented on ISE14.7 software.The image sensor uses a 30 megapixel OV7725 digital camera with a 25 MHz pixel clock that can work up to 60 frames per second in VGA format.Preprocessing module involves mean filtering,median filtering,edge detection,Corrosion,expansion and other algorithms.Storage module using MCB hard core comes with Spartan6 to control DDR3 to read and write,which is as simple as operating FIFO.With high-definition multimedia interface Sil9134 chip,display module can display image in real time,thus ensure high quality video signal transmission.The second part is the implementation of mean filtering,median filtering algorithm based on FPGA,the realization of the algorithm in the hardware requires high,and array accessing,algorithm processing is difficult.Compared with the mean filter results and median filter,it can be proved that the median filtering effect is better than the mean filtering,not only can remove the noise,but also can retain more image details.The third part is the implementation of adaptive threshold detection algorithm based on FPGA.After achieving the edge detection of gray image,then carrying corrosion and expansion,comparing the two results,to prove that the edge detection-corrosion-expansion image is better than the edge detection image,which is clearer,the edges are more clear.Each kind of preprocessing algorithm corresponds to a project.The module code is written in Verilog hardware description language.After compiling,add Testbench test incentive,and then simulate and debug.After the simulation,to verify on the Mis603 hardware platform.The verification results show that the system can process images output by CMOS image sensor in real-time,then perform real-time,clear and stable display.This system can achieve 30 frame per second in 300 thousand pixels,achieving the purpose of image noise reduction,making up the lack of speed and real-time of software processing system,so it can be directly applied to engineering practice.Later,this system will use a higher resolution image sensor,and add image enhancement,rotation and other processing.