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Research On HDMI Real-time Image Compression Technology Based On FPGA

Posted on:2019-09-16Degree:MasterType:Thesis
Country:ChinaCandidate:L XuFull Text:PDF
GTID:2428330545454458Subject:Engineering
Abstract/Summary:PDF Full Text Request
At present,the application of real-time video processing is becoming more and more extensive,such as video conferencing,live video,video telephony,and so on.The HDMI interface is currently the most widely used video interface.It cans transmission Ultra HD video and has the advantages of simultaneous transmission of audio and video,high transmission speed.With the improvement of image quality,the amount of data that needs to be transmitted is getting larger and larger,and the image compression technology has also been rapidly developed.This topic is based on the study of FPGA on real-time compression of video images transmitted by HDMI.Firstly,a improved wavelet transform compression algorithm is designed for the real-time requirement of video transmission.The algorithm divides the image into blocks and compresses each block individually.It uses a three-level 9/7 wavelet transform to perform improved SPIHT coding on the wavelet transformed coefficients.In the improved SPIHT code,The improved high-frequency coefficients in the SPIHT encoding process are discarded and the low bit invalid data is processed to perform the threshold decision,which reduces the redundancy and improves the compression efficiency.DCT transform compression algorithm is also implemented in this design.Will the improved wavelet transform compression algorithm comparing with the performance of the DCT transform compression algorithm,the experimental simulation results show that the improved wavelet compression algorithm of compressed image quality and compression ratio are higher than that of DCT transform.Secondly,real-time compression system is designed based on real-time compression algorithm and FPGA.The FPGA chip chooses EP4CE6 of Altera company Cyclone IV series.The system implements compression and decompression on two FPGA chips.The whole system is divided into four parts: FPGA control module,SDRAM memory module,HDMI video decoding module,VGA display module.The FPGA chip is responsible for implementing the control of the entire compression and decompression system and implementing the image compression and decompression algorithm,which is the core of the system.HDMI video decoding module selected ADI's HDMI decoding chip ADV7611,using the STM32 IIC interface to achieve the ADV7611 register configuration.Image block and ping-pang cache are applied in the SDRAM memory design,which shortens the time compared with the frame buffer of the traditional real-time image,and then the block image is sent to the compression module for processing.The decompressed data is displayed on the VGA interface.The VGA control chip is the ADV7123.By analyzing the experimental data of DCT transform compression and wavelet transform compression system compression and decompression,the delay,compression ratio and compression quality of the two methods are compared.It is proved that both methods have good compression performance and real-time performance in the compression system.
Keywords/Search Tags:FPGA, HDMI, Wavelet transform, SPIHT code, DCT transform
PDF Full Text Request
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