Design Of Key Circuit For Low Power Pipeline ADC

With the coming of the next generation 5G mobile communication era,the receiver module in the communication system puts forward higher requirements to the performance of the ADC.Unit time demand data amount increases at the same time the signal distortion requirements are higher.Therefore,the speed and accuracy of ADC are put forward in higher standards.At the same time,with the rapid development of portable electronic products,their power consumption of the ADC needs to be further reduced.In all kinds of ADC structure,pipeline ADC has higher performance in speed,accuracy,and power consumption.In order to meet the requirement of the conversion accuracy,speed and power consumption of pipeline ADC,this paper investigated and designed the key unit circuit module for 14 bit 80MHz sampling frequency pipeline ADC.According to the 14 bit 80 MHz pipeline ADC performance requirement,the technical specification of each unit circuit module was transformed into the following modules.We proposed a positive feedback loop gain operational transconductance amplifier for technology,which achieved high frequency gain.Frequency compensation technique is different from the traditional ones,which presents a new type of non Miller capacitor frequency compensation technique in order to reduce chip area and make frequency compensation and system stability.Simulation results showed that the DC gain transconductance amplifier was 156 d B,the unit gain bandwidth was 1.03 GHz,the output voltage swing was 2.5V,the setting time was 9.3ns.All these performance can meet the requirements of ADC.In order to reduce the power consumption of pipeline ADC,a new structure of sub-ADC circuit was proposed,which can realize the sharing of the preamplifier in the adjacent comparator,increase the reset switch circuit to reduce Kickback noise and eliminate the mutual interference between the two latches.The simulation results showed that the power consumption was improved by 2/3,which can meet the performance requirement of pipeline ADC.In this paper,a new high order temperature compensation method was proposed for the bias bandgap reference circuit,which reduced the negative temperature coefficient current by the common source current mirror.The design method of the pipeline ADC key circuit was based on SMIC.The transistor level circuits used 0.18 um standard CMOS 3.3V process.Finally,the layout of operational trans-conductance amplifier,dynamic latch comparator and bandgap reference circuits were designed using Virtuoso through the design rule checking DRC and LVS.Finally,the signal processing circuit layout was adjusted and oportimized to ensure the correctness and integrity of the layout design.