| With the rapid development of radar signal processing technology and A/D sampling technology,modern radar system has put forward higher requirements on the performance of the radar signal processing platform.Due to the limitation of operation capability and transmission bandwidth,old radar signal processing platform could not meet the increasing performance requirement.With the continuous development of chip integration technology,high-performance DSP that based on a new generation of multi-core architectures has emerged.The high integration of hardware resources including processor cores and high-speed interface,has brought great improvements of operational capability and transmission bandwidth.At the same time,with the continuous development of high-speed serial bus technology,the traditional parallel bus standard including CPCI,VXI and VME is gradually being replaced by VPX and other high-speed serial bus standard.Therefore,it is necessary to develop a new generation of radar signal processing platform based on new generation of high performance multi-core DSPs and VPX standard.In the field of high-performance multi-core DSP,the TI C66 x family of DSPs has the highest performance.TI DSP products also occupied the majority of market share.The ADSP-TS201 S and other early DSPs which are used by previous radar signal processing platform,by contrast,are gradually going to be withdrawn.Based on this situation,in this paper,a new kind of radar signal processing platform basing on TI C66 x family DSPs as main processing element was researched and designed.As radar signal processing platform architecture,the traditional platform architecture could not provide enough system bandwidth because they used parallel bus structure.It is difficult to accommodate more processing units to provide more operational capability for parallel bus structure.Therefore,this platform uses multi-board,multi-processor,multi-task,multi-threaded and high-speed serial bus standard to construct the board-level and system-level interconnection,instead of traditional platform architecture.This scheme can greatly enhance the performance of the platform.In addition,the platform also has good flexibility and versatility because the system is based on Open VPX which is an open standard.In this paper,the basic theory of ISAR imaging technique was briefly introduced,and the signal processing algorithm was simulated and verified through MATLAB.By using MATLAB,the echo data of the simulation target was generated and sent into this radar signal processing platform to verify the correctness of the algorithm and the performance of the platform.In this paper,the platform topology and system architecture of Open VPX was also introduced.Besides,the signal processing board based on TMS320C6678 and the high-speed switching network of this platform was described.In this paper,how to improve the multi-core boot method,modify and customize the tools chain and configuration files was briefly described.Aiming at the high-speed serial Rapid IO bus used in this platform,the Rapid IO specification was introduced in detail.Moreover,a precise and comprehensive test project was designed to test the performance of serial Rapid IO high-speed switching network in this platform.Finally,this paper described how to make a parallel decomposition of the ISAR imaging algorithm in order to make full use of the multi-core feature and hardware resources of TMS320C6678.In the end,the author designed the program of DSPs and FPGA,completing a verification in this platform. |
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