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Research And Implementation Of Operating System For Multi-core DSP

Posted on:2013-06-18Degree:MasterType:Thesis
Country:ChinaCandidate:H WuFull Text:PDF
GTID:2268330422973993Subject:Information and Communication Engineering
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With the continued promotion by requirements of the consumer electronics andmilitary high-performance information processing, multi-core processor has become animportant development trend of embedded application, especially in the field ofhigh-end radar signal processing, as well as mobile intelligent terminal. However,multi-core processors enhance the computational performance and at the same timepropose a series of new problems and complexity to the development of applicationsoftware. In order to improve the efficiency of application software development, itbecomes very important to design multicore operating system for effective resourcemanagement and task scheduling. Multi-core operating system has become an importanttopic in the field of embedded information processing. By the demand of a project andbased on the TI’s new KeyStone architecture8-core DSP processor TMS320C6678, thethesis studies inter-processor communication method of multi-core DSP, and designs onthe basis of μC/OS-II to achieves a real-time operating system μC/OS-C6678formulti-core DSP. The thesis includes the following aspects:Chapter1introduces the application background and significance of the thesis. Areview of existing researches of embedded real-time operating system and asummarization of existing key techniques of operating system for multi-core DSP suchas inter-processor communication, booting and task scheduling are outlined.Chapter2analyzes the hardware architecture of TMS320C6678, including themechanism of core architecture, memory architecture, timer architecture, interface andperipherals architecture. It is very important to acquire the mechanism of hardwareplatform for designing operating system on multi-core DSP.Chapter3studies an inter-processor communication method of multi-core DSP byanalyzing characteristics of multi-core DSP processor. Firstly, the problem of cachecoherence is analyzed, and a method which can solve the problem is proposed.Secondly, inter-processor communication is designed and implemented and from theview of the system, two topological structures are designed and simulated, and theperformance is analyzed and compared. Some reference value is provided for designinginter-processor communication of operating system on multi-core DSP.Chapter4focuses on the design and implementation of operating system formulti-core DSP, and conducts some experiments. Firstly, booting module, timer moduleand tast module are designed. Secondly, based on the NAS Benchmark and PD radaralgorithm, the method of transplantation and parallelization is proposed, and test resultsare obtained. The experimental results show that the operating system μC/OS-C6678verifies the speed-up ratio of parallel computing, and can substantially increase theoperation efficiency of the traditional PD algorithm. Some application value is provided for designing signal processing computing.Chapter5summarizes the researching work of the thesis and presents anexpectation of the future work.
Keywords/Search Tags:embedded operating system, multi-core DSP, TMS320C6678, inter-processor communication, cache coherence, task scheduling, speed-upratio, radar signal processing
PDF Full Text Request
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