Design Of Real-time Radar Signal Processing Platform Based On Multi-core Dsp

With the higher and higher requirements of the real-time radar signal processingsystem for computing ability, processing speed, data throughout, and workingenvironment, the traditional radar signal processing platform will unable to meet thetechnical development and design requirements of the project. In this context, a designof a kind of real-time signal processing platform with the basic architecture of onehigh-performance FPGA chip, four multi-core DSP chips and VPX standard bus isproposed.In this thesis, based on the features of high precision and high resolution of theradar signal processing system, first the specific needs of the system for processingability, data transmission rate and so on are analyzed generally, the appropriatehigh-performance FPGA chip and multi-core DSP chips are selected and the entiredesign framework is given. Second, the design ideas, theories and hardware designmethods of the power module, clock module and peripheral equipment module of thecore processor of the signal processing platform are described in detail. Then, the basicworking principles and specific methods of the high-speed serial interfaces includingSRIO, PCIe, Hyperlink and Gigabit Ethernet are researched, and the actual test onstability and transmission rate of these interfaces is also given. Finally, the boot loadermode of the multi-core DSP chips is elaborated specifically and the implementations ofSPI boot loader mode are given combined with the actual application requirements; onthis basis, the secondary boot loader, multi-mode and multi-core boot loader to load theprogram are given. This thesis completed the hardware design, high-speed interfaceprogramming design and boot loader design of multi-core DSP chips et al of thereal-time radar signal processing platform based on multi-core DSP chips. And manyproblems are encountered and solved in the way of design, with a certain engineeringvalue.