Study On Multi-core DSP Parallel Processing Technology Based On TMS320C6678

With the continuous development of radar imaging technology, the imaging range,imaging precision and real-time processing requirement is becoming more and more higher,which raises the need for a greater amount of data, a greater amount of computation andimaging speed.The use of a single-core DSP to complete the computation is no longersatisfy the changing need in this area. Multi-core DSP parallel processing is becoming thedevelopment trends. The research on the TMS320C6678multicore DSP has been goingon for some time.The proper development of the parallel processing of radar signal on theTMS320C6678chip is particularly important. The main contents in this thesis include:1. Study the Keystone multicore architecture and the CorePac of the TMS320C6678,as well as the4-DSP general purpose platform based on C6678,with focus on the SRIO、Hyperlink and EDMA3interacteve technology in the C6678which is commonly used inthe radar signal processing.The implement scheme of the synchronaiztion technology basedon C6678is also explored.2. For the FFT operation which is the main operation in the SAR imaging,the FFTalgorithm that is based on2-dimensional matrix and which can be devided into multipleparallel tasks is studied.With the constraints of the small memory on the C6678,the paralleltiming sequence is desgined and the very long points FFT based on the co-processing ofmulti-core is achived.That includes the single DSP parallel processing based on C6678andthe multiple DSP parallel processing based on Hyperlink.Compared to the single coreprocessing,the efficiency of the single DSP multi-core co-processing achive linearenhancement, while the multiple DSP co-processing could calculate longer points FFT withthe constraint of small memory.3. Optimize the multicore processing of the2-D splitted FFT,which includes themulticore synchronization based on the MSM.Compared to the conventionalsynchronization technology,the calculation speed is5times faster.The memory optimizationbased on twiddle factor minimize the memory usage more than one hundred times by themethod of calculating other twiddle factors using the rule of one line of twiddle factors.Theparellel processing optimization based on the double buffers further shorten the FFT calculation delay through the parellizaion of data IO and inner-core calculation.4. Design the implementation of CS algorithm of SAR imaging based on the generalpurpose processing platform.By using the multi-core parallel processing algorithm of2-DFFT,the multicore data storage technology,the trigonometric lookup technology,the parallelimplementation for the conventional echo matrix and big echo matrix in CS algorithm isdesigned.