Research Of Radar Pulse Compression Technology

Pulse compression (PC) has been widely used in modern radar signal processing,because it can effectively resolve conflicts on that rader range,range resolution and speed resolution.With the continuous development of FPGA and CPLD devices, and constantly improve the performance of its digital signal processing, using FPGA to implement digital pulse compression radar is becoming a mainstream trend.Firstly, the development and status of pulse compression system is analyzed by this thesis, describe the relevant principles of pulse compression system, which includes digital down conversion technology, LFM signal compression technology and distance sidelobe suppression methods; For LFM signal, NLFM signal and the phase encoded signal, its are compared the advantages and disadvantages , based on the actual need ,the system chooses the LFM signal implemented pulse compression.Followed by comparative analysis of the two implementations of digital pulse compression, the paper selects frequency-domain pulse compression method to realise pulse compression. The appropriate parameters of LFM signal are selected by the theory, the simulation of the system is simulated in MATLAB and analysis the noise impact on the pulse compression system. For a part of hardware implementation,the system used structured design concept to divide function module. Through,the Joint design idear of FPGA IP core and VHDL programming module achieved digital compression system and the scheme of hardware implementation of the system are described in detail. Finally,using the joint simulation methods of MATLAB and Quartus ? tested the function of the pulse compression system.The design of digital pulse compression system presented in this paper has been realised in EP2S60 platform (EP2S60F672C5ES), the system has passed the performance test, the performance indicators are good, and the indicators have reached the design requirements.