Research And Design Of A Synchronous Step-Down DC-DC Converter XD2188

DC-DC converter has been widely applied in various of electronic products because of its high efficiency and large load current.With the development of Internet of Things industry and Intelligent Manufacturing industry,reliability,high integration density and transient response have become research highlights.Based on the research project of High Speed Circuit Design and EMC Laboratory in Xidian University,a DC-DC converter XD2188 is proposed in this thesis surrounding the three key points as above.This thesis firstly introduces three basic topologies of switching power supply and its working principle and mathematical models.A comprehensive and detailed analysis of the basic working principle and key technology of Buck DC-DC converter is presented.The design method of loop compensation is introduced.On the basis of theoretical analysis,this thesis describes the process of XD2188 chip design.To achieve the research purpose of high reliability,this thesis designed a hiccup mode short circuit protection module.The chip continually works in low power dissipation condition when the short circuit occurs,and automatically enters the soft start state when the short circuit is removed.This design overcomes the weakness of the traditional current limiting module that the system cannot completely recover to normal operation.The logic control circuit of the module is redesigned to reduce its complexity.To improve relibilty of the chip,this thesis combines the Enable module and PLL circuit and multiplex the Frequency Synchronization pin and Enable pin.When the system detects the enable signal,it starts normally and works at a default clock frequency 1MHz.when detecting the input of external clock signal in the range of 1MHz to 2MHz,the frequency synchronization mode functions.This thesis presents a bipolar folded error amplifier with gain boosting structure.Its gain is 70 d B and the phase margin is 66.69 degrees.This module is composed of a transistor differential amplifier and CMOS current mirrors that provide bias current for the amplifier.It both meeting the requirements of low power consumption and large bandwidth.Therefore,the transient response of the system is improved.After completing the principle analysis and circuit design,functional simulation of submodules and the whole chip using Cadence was accomplished based on 0.5?m BCD 30V process.The key points to improve the performance of the system were verified by simulation results.