Research On The Compatibility Of Turbo Codec And Its FPGA Implementation

Error correction code technology is one of the most important approaches to ensure the reliability of communication.As a milestone in the history of error correction code,the performance of binary turbo code is close to the Shannon limit.Until now,turbo code has achieved great success and has been favored by many communication standards.The double binary turbo code is the product of the further development of binary turbo code,it has advantages on coding efficiency,decoding delay and error floor.However,its decoding process is more complex,the calculation of metrics occupies more resources and consumes more energy.With the development of turbo code technology,some communication standards have changed the original turbo code in their new versions,which result in the non-compatibility of different versions and difficulties of updating equipment.Although the turbo code is widely used by many popular communication systems,but the coding rules are different.Furthermore,some parameters need to be explored to obtain the best turbo performance,require turbo codec have great compatibility and expansibility.This paper focuses on the compatibility and expansibility of turbo codec,and the contributions are summarized as follows:Firstly,key factors which influence the performance are analyzed,such as the number of decoding iterations,the depth of interleaver,the coding rate,the decoding algorithm and the coefficient of extrinsic information,and the Enhanced Max-Log-MAP algorithm is chosen as the balance of performance and complexity.Based on the chosen algorithm,we analyze the calculation of the metrics of double binary turbo code and propose a simplified method,which uses combining calculation and equivalence comparison.For DVB-RCS2 system,when calculating the backward metrics,the proposed method is able to reduce the number of addition to 54% compared with original method.This method can also be applied to forward metrics and be further extended to non-binary Turbo codes.Secondly,we study on the double binary turbo code and propose a scheme to design the codec which can be used in DVB-RCS and DVB-RCS2 standard.The proposed scheme reuses the same parts of turbo codes of standards,such as some registers and block memory,and control the comparison selection module in the DVB-RCS2 so that it can be compatible with the DVB-RCS.The proposed scheme uses selection signal to distinguish DVB-RCSand DVB-RCS2 standard over different parts between them.As a result,with few extra resources,the codec which is designed according to the proposed scheme can be applied to both DVB-RCS and DVB-RCS2 standard,which are implemented in FPGA and used to download and test.Finally,focused on binary turbo code,this paper proposes easily-configured codec based on the idea of combining hardware and software.According to the encoding parameters,the software is supposed to generate configuration file for hardware.Insulating all key factors in each sub-module,the structure of hardware uses generated files to configure them,resulting in the great improvement of universality to be used in various communication systems without increasing hardware resources.In this case,it can be applied to not only popular communication systems,but also custom communication systems.With the function of proposed codec verified by downloading and testing,this idea are supposed to be applied to the architecture of non-binary Turbo code further.