High Speed Turbo Product Code Technology And Implementation Based On FPGA

During the development of channel coding theory, Turbo product code(TPC), as an efficient channel coding technology proposed in 1994, has high code rate, superior BER and hardware complexity. It gradually becomes a hot topic in channel coding. TPC has a closer gradual performance to the Shannon limit compared with Turbo code of the same code rate. With the continuous development of communication field, communication system requires higher and higher reliability and efficiency performance in deep space communication and mobile communication field. Because of its excellent error correction performance and relatively simple decoding algorithm, TPC has been widely used in the application and hardware implementation.Firstly, this thesis introduces TPC coding principle and subcode, and also explains the Chase algorithm. It also introduces the rapid decoding with test sequences, saving storage resources, reduce candidate codeword, calculation of the external information without competition codeword and parallelism decoding improvement. Then this thesis analyzes the performance of advanced decoding algorithm in theory.Secondly, this thesis uses software to construct a communication system model. This model detailed verifies the influence in subcodes, iterations, unreliable position, quantization and channel of TPC decoding performance. This thesis also analyzes the advanced chase algorithm in performance.Finally, this thesis describes the TPC encode and decode implementation based on FPGA. The structure and improvement of TPC decoder is introduced in detail. Then a parallel subcode decoder(MIMO) is proposed, MIMO can simultaneously receive the entire subcode, sort the bit sequence to search the unreliable position, arrange for the candidate codeword and calculate the extrinsic information. MIMO greatly reduces the time delay, improves the parallelism of decoding and throughput of the system. The design has been developed on Xilinx Kintex-7 XC7K355 T with utilization 39% of the logic resources and 35% of the storage resources. The TPC decoder supports encoding and decoding of(1024, 676),(2048, 1824) and(4096, 3249). The data throughout can achieved 274.80 Mbps in(1024, 676) and 571.34 Mbps in(4096, 3249) with the maximum working frequency of 150 Mbps.