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The Research Of Turbo Codec Based On FPGA

Posted on:2013-04-25Degree:MasterType:Thesis
Country:ChinaCandidate:C Y NingFull Text:PDF
GTID:2248330377455813Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
Turbo code as a kind of high performance channel coding, with its superior performance and approximation the Shannon’s capacity bound, it has been widely used in telecommunications. The encoding and decoding principle and realization of hardware have been made further study and research in the paper.Based on the study of the Turbo encoding and decoding principle, component code、 interleave、puncturing matrix and several other key issues are studied and discussed. MAP decoding algorithm, Log_MAP decoding algorithm and Max_Log_MAP decoding algorithm are analyzed and compared. Put forward the overall design of the coder and decoder based on FPGA, select Altera’s CycloneⅢ devices, the use of VerilogHDL language to complete the simulation design. According to the characteristics of hardware Log_MAP decoding algorithm is improved, and use the sliding window decoding technology, reduced the hardware resources occupation rate and the processing delay. And from the length of interleaver, the number of iterations, decoding algorithm for decoding performance in three areas were analyzed.
Keywords/Search Tags:Turbo code, Log_MAP decoding algorithm, Sliding-Windows, FPGA
PDF Full Text Request
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