Research On High-Speed Naked-Eye 3D TV Image Signal Processing Technology

Naked eye 3D display technology as an epoch-making technology is the next generation of television technology important research and application direction.HD naked eye 3D TV will lead the trend of the times into the tens of thousands of households.This paper analyzes and studies the structure and function of high-definition naked eye 3D image processing system,and develops a special driving integrated circuit for high-definition naked eye 3D TV image signal processing.It focuses on the analysis of data reception,processing and transmission display in naked eye 3D TV image processing system.The main tasks are:(1)Developed high-definition naked eye 3D TV image signal processing dedicated drive circuit.According to the characteristics of HD naked eye 3D TV transmission data and image data need to be real-time transmission and display,we build a system frame based on FPGA as the core processing chip.FPGA's strong parallel processing ability can complete high-speed and high-quality image signal data receive transmission and processing tasks.(2)Hardware circuit development.Research and analysis of HDMI interface hardware design requirements and transmission protocol,designed based on HDMI decoder chip image receiving circuit module.According to the display device interface requirements based on LVDS interface design of HD naked eye 3D image transmission circuit module.According to the circuit schematic design PCB,and finally completed the circuit board welding debugging work.(3)Three-dimensional image fusion algorithm and timing control technology logic design.The system needs to be converted to the left and right format image into a separate interpolation for the three-dimensional display format.the design uses two sets of fifo four fifo complete data separation.Data separation in accordance with the display device timing requirements were sent to the display device left and right sub-screen.Complete the left and right format image interpolation fusion,to achieve three-dimensional image display.(4)LVDS interface HD naked eye 3D image transmission module logic driven designing.FPGA integrates a feature-rich IP core.The module logic design uses IP core Lvds_tx to achieve image data transmission based on LVDS interface.Through the deep research and analysis of HD naked eye 3D TV image transmission processing,the FPGA-based HD naked eye 3D TV image signal processing dedicated drive integrated circuit has realized LVDS interface HD display,left and right format stereo image separation and fusion display and so on.System design can provide support for the naked eye 3D TV driven chip designing to promote the naked eye 3D TV industry rapid development.