65nm NOR Flash Memory Chip RTS Noise Research

The advent of big data era has brought new opportunities,but also puts forward new challenges for mass storage.Floating gate memory is one of the most widely used nonvolatile memory,the non-volatile semiconductor memory occupied more than 90% of the market.Researches show that the decrease of the device size and technology improvements will bring storage reliability problems,the random telegraph signal(RTS)problem due to process into the nanometer era is more outstanding,noise signal jitter,which will affect the correctness of the information read,even may cause failure on the chip function and performance.This paper aimes at the random telegraph noise on 65 nm process NOR type flash memory and its effect to the reliability of the device.The main research contents include: gain basic parameters of NOR flash for random telegraph noise;By random telegraph noise analysis,obtain the distribution of RTS defect`s space and level;Based on capture/emission cross section model to study the different threshold voltage state for the effect of the RTS time constant.Through a lot of experiments,get the conclusion that with the increase of threshold voltage,the device`s RTS noise capture time increases,the emission time decreases;Aiming at the phenomenon,put forward the capture/emission cross section model.The main innovation point of work is that studied the threshold voltage for RTS signal and the influence of the corresponding RTS defect,and established the physical model based on capture/emission cross section for the first time;For the process of trap capture/emission with electronic,as well as the rely of RTS noise on the device`s threshold voltage has a more profound understanding.For NOR flash`s RTS noise physical mechanism and reliability degradation mechanism,these results have certain scientific significance.At the same time,provide a reference for improving the reliability of the NOR type flash memory.