.65 Nm Flash Memory Reference Voltage Adjustment Algorithm Applications And Improvements

This paper is based on 65nm NOR Flash development project in Intel Shanghai. With the deep understanding on Flash Reference Voltage Trim Algorithm,this paper implemented and improved the Algorithm in 65nm NOR Flash wafer level testing.Simply put,reference voltage is a voltage source with high stability used in a lot of electronic devices.It is also a basic part of Flash Memory in order to implement all kinds of Flash operations.For example,it is required to apply fixed voltage on the gate and drain of Flash cell during read and write operations.With the improvement of FAB process,the intrinsic characteristic of the device is subjected to change.And also the accuracy requirement for reference voltage increases accordingly.Therefore the existing Trim Algorithm is no longer applicable to 65nm Flash memory.Improvement and adjustment must be made in response to the FAB process change.This paper starts with basic NOR Flash program mechanism,studies and understands the every single step of existing Algorithm in detail.Then collect volume data to get the parameters of 65nm FAB process,such as the slope of program characteristic curve.And adjust the Algorithm accordingly.A good algorithm must be able to prove itself in High Volume Testing(HVM), i.e.meet the HVM requirements,such as the yield requirement which must be larger than 99%.This paper analyzes the HVM issue based on volume data,finds the commonality and digs out the root cause theoretically.Finally offer a feasible and effective solution which increases yield by more than 3%.