A New Type Of High Voltage Based On P Type Epitaxial Layer Structure Design And Simulation Of SOI-LDMOS

The lateral double-diffused metal oxide semiconductor field effect device based on silicon-on-insulator has the advantages of good self-isolation effect,high reliability and elimination of auxiliary depletion effect of substrate.It is widely used in intelligent power integrated circuit and high voltage power integrated circuit and other related fields.Due to the high voltage,high current and high-speed energy switching environment,the LDMOS devices require higher thermal management and reliability.As two main performance parameters,breakdown voltage and on-state resistance,should be improved in the high-voltage and high-power integrated circuits to acquire higher performance and reliability.However,in traditional SOI-LDMOS devices,the on-state resistance and the breakdown voltage is positive correlation.To address the contradiction between the breakdown voltage and on-state resistance of traditional SOI-LDMOS devices,this thesis mainly focuses on the structure design and simulation research of a new high voltage power SOI-LDMOS device The research contents are as follows:Aiming at the problem that the breakdown voltage and the on-state resistance of traditional SOI-LDMOS devices are contradictory to each other,a structure design method of multi-stage Ptop-LDMOS(MSPtop-LDMOS)high-voltage power devices with increasing spacing is proposed.Firstly,based on the traditional SOI-LDMOS device,the Ptop layer is formed by introducing the P-type epitaxial layer above the N-type drift region,and the Ptop-LDMOS device structure is obtained.Then,the Ptop layer above the Ptop-LDMOS device is divided by non-equidistant space,and then the MSPtop-LDMOS device with multiple P-type epitaxial region with increasing space is designed.Secondly,to solve the problems of large electric field peak value and uneven electric field intensity distribution in SOI-LDMOS devices with equal spacing distribution,this thesis designs the P-type epitaxial layer on the structure surface of MSPtop-LDMOS devices and the graded non-equal spacing distribution structure.After the electric field distribution in the device drift region is modulated and optimized,It can significantly reduce the peak electric field in the device drift region.Furthermore,by further optimizing the doping concentration in the device drift region,the optimized MSPtop-LDMOS device is finally obtained.In this way,the on-state resistance of the device is kept at a low level,and the breakdown voltage is increased at the same time,which alleviates the contradiction between the breakdown voltage and on-state resistance to a certain extent.Thirdly,the mathematical modeling method of MSPtop-LDMOS device is studied.The mathematical modeling of MSPtop-LDMOS device was established by Sentaurus Workbench.The model of MSPtop-LDMOS high-voltage power device was established by adding a p-type epitaxial layer process and a p-type epitaxial layer photoetching process.MSPtop-LDMOS device is compatible with COMS process and has the characteristics of simple process.The electric field distribution,breakdown voltage and output voltage of MSPtop-LDMOS device are simulated and analyzed.The results show that,compared with the traditional SOI-LDMOS devices,the breakdown voltage,on-state resistance and FOM value of Ptop-LDMOS devices are increased by 35.2%,28.1% and0.43 times.Compared with Ptop-LDMOS devices,the performance of MSPtop-LDMOS devices is also greatly improved.The breakdown voltage is increased by 26.3%,the onstate resistance is decreased by 64.5%,and the FOM value is increased by 3.5 times.In conclusion,the MSPtop-LDMOS device proposed in this thesis has significantly improved its voltage resistance characteristics,conduction characteristics,quality factors and other indicators,and has verified the practicability of the device.The results show that the proposed MSPtop-LDMOS device can improve the contradiction between breakdown voltage and on-resistance to a certain extent,and it is beneficial to the promotion of intelligent power integrated circuits and high-voltage power integrated circuits.