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Research Of Column-level Cyclic ADC For TDI-CMOS Image Sensors

Posted on:2017-01-21Degree:MasterType:Thesis
Country:ChinaCandidate:S L ShenFull Text:PDF
GTID:2348330515463880Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Time-delay-integration technique significantly improves the image quality under the conditions of high scanning speed and low illumination based on multiple exposure of the same object.Currently,TDI image sensor is widely applied to medical imaging,satellite remote sensing,industrial detection and etc.Compared with charge-coupled device,TDI-CMOS image sensor is becoming a hot spot of research due to the features of low cost,radioresistance and high integration.As an indispensable part of the readout circuit of TDI-CMOS image sensor,ADC plays an important role and have a prominent effect on the quality of image.This paper focuses on the research and design of the column-parallel ADC.In this paper,the signal accumulation scheme of the TDI-CMOS image sensor is firstly analyzed.According to the characteristics of the digital domain accumulation scheme,the cyclic ADC structure is chosen with its medium conversion speed.Considering that non-ideal effects such as comparator offset,capacitor mismatch and finite op-amp gain will limit the accuracy of cyclic ADC.And in order to correct the nonlinear errors,capacitor plate-flipped architecture is thus chosen for the convenience of calibration.Since the effects of comparator offset can be eased by the RSD coding,while the nonlinearity introduced by the switch can be reduced by the bootstrapped switch,the paper mainly focuses on the capacitor mismatch and the finite op-amp gain.To correct the errors caused by the capacitor mismatch and finite op-amp gain,a digital calibration method is proposed,and the circuit and layout are designed.Under the condition of 0.3% of the capacitor mismatch,the simulation results show that SNDR is improved from 63.65 dB to 73.73 dB.Due to the large area of digital calibration blocks,a cyclic ADC is realized to calibrate the capacitor mismatch in analog domain,and applied into TDI-CMOS image sensor as the column-parallel ADC.The simulation results show that the cyclic ADC can achieve 8.66-bit,and 0.6mW power dissipation.The cyclic ADC designed is suitable for TDI-CMOS image sensor with an area of 0.03×1mm2.
Keywords/Search Tags:CMOS image sensor, Time delay integration, Column-parallel cyclic ADC, Calibration
PDF Full Text Request
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