Energy-aware Design Techniques For DSP Applications

In recent years,portable multimedia device have proliferated with the booming of Internet of things(IoT),and the number of applications supported by these devices has increased rapidly,which brings great convenience to people.Too many applications cause high energy-consumption of chip,and in addition,the power density of chip increases rapidly while the width of CMOS process decreases.Therefore,energy-consumption becomes bottleneck of the development of portable multimedia device.Digital signal processing(DSP)system works as main arithmetic unit in portable multimedia device,which has great influence on the device in terms of performance and energy-consumption.So,how to design a low energy-consumption DSP system becomes key of decreasing energy of portable multimedia device.This article makes a deep research on energy-aware technology applied to DSP system from the development status,theoretical basis and design method.Multiplier and DCT system are chosen to implement energy-aware technology with three energy-saving techniques which are reducing dynamic range,reducing number of computations and voltage scaling.Finally,an energy-efficient probabilistic prediction based fixed-width multiplier and energy-aware adaptive precision 2-D Discrete Cosine Transform(DCT)system are designed.Firstly,this article introduces probabilistic prediction based fixed-width Booth multiplier from probabilistic prediction algorithm and architecture of compensating circuits.Then,EDA tools from Synopsys are used to simulate and emulate combined with analysis in terms of accuracy and energy-consumption.It can be concluded that this energy-efficient multiplier could use little energy to get accurate results.Back-end design and verification are described later,and this design is taped out in 0.18?m standard CMOS technology.Testing work is described in the end and results show that the chip can work correctly.Moreover,adaptive precision fixed-width Booth multiplier is designed according to probabilistic prediction based fixed-width Booth multiplier.Then,it is applied to energyaware adaptive precision 2-D DCT system along with energy-saving techniques reducing dynamic range and reducing number of computations.This article adopts UVM verification platform to simulate and calculate precision index.Power Compiler is used to calculate power.After all simulation,a whole analysis about accuracy and energy-consumption is made.Compared with other adaptive precision 2-D DCT architectures,proposed design has balanced precision modes which also get more accurate results with less energy.Afterwards,low voltage simulation is done on 2D DCT circuits and minimum energy point is get according to simulation results.Finally,back-end design and simulation are described,and this design is taped out in 0.11?m standard CMOS technology.