The Design And Implementation Of High-speed Storage Array Based On PXIe Bus

In the field of radio monitoring,detecting and capture of transient signals is the focus and difficulty,so high-bandwidth and high-capacity real-time memory plays a very important role in the work.In this paper,the technical indicator is IF data storage of laboratory spectrum analyzer,storage media using NAND Flash,the control unit using FPGA.To ensure the storage bandwidth and capacity requirements,the paper designed a 4*4 storage array.To play back the data to upper software for analysis,PXIe high-speed bus interface is used in the design.The paper mainly studies the implementation of high-speed data transmission protocol for PXIe bus and the NAND Flash array controller.In the PXIe bus protocol,the design and implementation of PIO configuration,DMA transfer mode and interrupt control module are introduced in detail.In the NAND Flash array controller,the design and implementation of NAND Flash interface controller,bad block management module and ECC module are introduced in detail.The paper has concluded the reasons of NAND Flash bad block,to reliable storage and faster to bulid bad block lookup table,bit search is proposed.To solve the problem of fast matching of bad block information,a bad block matching scheme based on sliding window is proposed.To solve the problem of burst bad blocks can cause write speed to drop,a lagging write scheme is proposed.Finally,in order to solve the problem of multi-bit rollover in MLC NAND Flash,the scheme of embedding BCH code in Hamming code is proposed.In order to verify the performance of the PXIe storage array,the paper has two experiments.at first,the design of each module is test in separate,the results are: 1.the data through DMA read to the upper software can reach 12.5Gb/s,and interrupt trigger response timely.2.the NAND Flash transfer rate can reach 7.5Gb/s when NAND Flash array controller works in the pipeline mode,it shows all of the module meet the needs of the design.Then enter the system test,the system sampling clock is 204.8MHz,the sampled data width is 32 bits,after written to the NAND Flash memory,then read them out to the computer software,It is analysed that the characteristics of the test data and the sent data are same,Note that the design in this article has reach the goal.