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Implementation Of Multi-channel High Speed Signal Acquisition And Processing Technology

Posted on:2018-10-03Degree:MasterType:Thesis
Country:ChinaCandidate:W J LiFull Text:PDF
GTID:2348330512984827Subject:Engineering
Abstract/Summary:PDF Full Text Request
The research of modern communication technology can not be separated from the analysis of various signals.The acquisition of signal data provides an important data base for research in these areas.The continuous improvement of modern information processing capability puts forward new requirements,such as higher speed,higher precision and larger data volume for signal acquisition technology.The main work of this subject is to achieve multi-channel high-speed signal acquisition and processing technology based on FPGA.The DDR3 interfaces is used to achieve data storage capacity expansion in the hardware design.The PCIE bus is used to achieve high-speed data transfer in DMA mode.In this thesis,the basic hardware requirements of the signal acquisition system are studied theoretically.High-speed signal acquisition with single-channel 4GHz sampling rate is achieved by alternately sampling on the time axis.In the development process explore the DDR3 interface and use DDR3 SDRAM to expand the storage capacity of FPGA development board in order to meet the requirements of the subject that single sampling data size is more than 500 MB.The system's storage capacity expanded to 2GB.The development of hardware control logic use ML605 development board.In the data transmission solution use the PCIE local bus and PCIE protocol to implement data high-speed transmission module design.The data transfer rate of the acquisition system can reach 350MB/s.The main work of this thesis:(1)The hardware structure of the system is designed.Divide the functional modules of the system.(2)DDR3 transfer interface is designed.The data write and read operations are controlled by the module in the system(3)User control logic of PCIE is designed.According to the PCIE protocol requirements to achieve data packet unpacking and data packaging functions,(4)Pulse extraction logic module design and implementation to achieve high-speed pulse signal extraction,and to achieve pulse segment detection.The single-channel sampling rate of multi-channel high-speed signal acquisition and processing equipment can reach 4GHz.Supports up to 8 channels for data acquisition at 1GHz or less.The device can collect 2G data at a time.The device provides the user with a selectable pulse extraction function.The device acquisition function can be applied to a variety of signal.
Keywords/Search Tags:Signal acquisition, ML605, PCIE, DDR3, FPGA
PDF Full Text Request
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