Research On The Breakdown Voltage Of SOI LDMOS Devices With Thin Buried Oxide Layer

The isolation between high voltage power devices and low-voltage integrated circuits is one of the focuses of PICs(power integrated circuits).SOI(Silicon-on-Insulator)technology for PICs can provide excellent dielectric isolation,so the development of SOI PICs is receiving more attention in the word.SOI high-voltage power devices are the most important component in the SOI PICs,whose characteristics will affect the performance of the latter.The breakdown voltage of the SOI high voltage device is studied and the effects on the breakdown voltage are analyzed in this thesis.In this thesis,the parameters of conventional SOI LDMOS device are simulated.Based on the analysis of the electric field distribution and breakdown characteristics of the relevant parameters,the effect of each parameter on the breakdown voltage is pointed out.The structure of based TND SOI LDMOS device is proposed.By studying the trench parameters,it is pointed out that this structure has the advantages of improving the lateral breakdown voltage and reducing the area of the wafers occupied by the device.Conventional SOI lateral high voltage power devices,most of its vertical pressure is always relying on the thickness of the buried oxygen layer,when the thickness of buried oxide layer change,the device vertical pressure will have a greater change.Based on the structure of TND SOI LDMOS device proposed in Chapter 3,the thickness of buried oxygen layer is reduced,and two kinds of structures are introduced to enhance the vertical breakdown voltage.The first structure is TND SOI LDMOS device structure with a buried N-type layer.When the buried oxide layer assumes the same voltage,the electric field intensity in the buried oxide layer is inversely proportional to the thickness of the buried oxide layer.It is possible to reduce the thickness of the buried oxide layer by increasing the electric field intensity in the buried oxide layer.Based on the dielectric field enhancement theory,the introduction of the buried N-type layer can achieve the purpose of enhancing the electric field in buried-oxygen layer.It is found that,although this structure achieves the above-mentioned purpose of vertical breakdown voltage,the introduction of buried N-type layer also leads to an increase in on-state resistance.The second structure is TND SOI LDMOS device structure with a buried P-type layer.The N-drift region and the buried P-type layer constitute a vertical reverse-biased PN junction.In this structure,most of the pressure resistance is achieved by the PN junction,and the thickness of the buried oxide layer is thinned.The buried oxide layer is only used for interrupting the electrical connection between the active layer and the substrate.Finally,the previous work is summarized and extended,which points out the shortage of work and the development direction of this study in the future.