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Research On The Design Of Buried-layer In Bulk-silicon LDMOS

Posted on:2016-09-15Degree:MasterType:Thesis
Country:ChinaCandidate:Q W SongFull Text:PDF
GTID:2308330470473158Subject:Condensed matter physics
Abstract/Summary:PDF Full Text Request
As the core device of power integrated circuit, the LDMOS is becoming a hot spot among domestic and international researchers in recent years. However, the contradictory relation between the breakdown voltage in lateral high-voltage power device and resistance has limited the applications of the LDMOS in high voltage current. As a result, the design of LDMOS that meet the demand of a certain pressure and lower resistance is an important research in power semiconductor technology. RESURF technology proposed since 1979, beginning with the Single-RESURF, then Double-RESURF development and the Triple-RESURF, has become the basic principle of lateral high-voltage device design. Especially for DR and TR LDMOS, the design of p-type buried layer(as NMOS) is the key to optimize device characteristics, but the existing literature have simple introductions of the analysis of DR and TR LDMOS p-type buried layer on the longitudinal electric field modulation function, in fact, the thickness, depth, doping concentration of p-type buried layer have important influences on the longitudinal electric field, the breakdown voltage of the device and resistance. This article aimed at the design of RESURF buried layer of LDMOS.1, P-top layer design of Double RESURF LDMOS.The influence of the thickness and the doping concentration of P-top layer on longitudinal electric field device is studied. Both breakdown voltage and resistance of the device decrease as the concentration of P-top layer increase, Double RESURF device reduce resistance of device must be at the expense of the breakdown voltage. On the one hand, when the concentration of drift region is fixed, the breakdown voltage and resistance of the device increase as the thickness of P-top layer increases at the same time, but the design optimal value of BV2 / Rs,on decreases, when the pressure is between 500-600 V, P-top layer thickness increases from 2 ?m to 8 ?m, design optimal value decreases by 18%. On the other hand, when the concentration of the P-top layer is fixed, the breakdown voltage of the device and ratio of resistance decrease as P-top layer thickness increase, but design optimal value of BV2 / Rs,on is still lower, when the pressure between 450-650 V, P-top layer thickness increases from 2 ?m to 6 ?m, design optimal value decreases by 34%. The thin P-top layer should be applied to RESURF device design.2, P-type buried layer design of Triple RESURF of LDMOS.The influence of the depth, the thickness and the doping concentration of the p-type buried layer on longitudinal electric field device is studied. When the p-type buried layer being near the device surface, longitudinal electric field has a small average result and low breakdown voltage; When the p-type buried layer being close to the substrate, the concentration of the optimized the drift area is low, the resistance device is large; When p-type buried layer locates in the middle of the drift region, its design optimal value of BV2 / Rs,on, increases by 137% and 43% on the shallow buried layer and deeply buried layer respectively. When the pressure is between 600-700 V, the thickness of p-type buried layer increases from 2 ?m to 8 ?m, design optimal value of the device reduces by 21%. The article finally introduces the studies of the influence of p-type buried layer concentration on breakdown voltage and resistance of device. To DR LDMOS, the increased of concentration in TR LDMOS has weaker function in the breakdown voltage decreased. Thin buried layer located in the middle of drift region should applied to Triple RESURF device design.
Keywords/Search Tags:Buried-layer, Breakdown Voltage, On Resistance, RESURF, LDMOS
PDF Full Text Request
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