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The Design And Implementation Of DMA Transfer And The Application In BFS Algorithm Based On Xilinx Virtex-7 FPGA

Posted on:2016-04-12Degree:MasterType:Thesis
Country:ChinaCandidate:Y F ZhangFull Text:PDF
GTID:2348330509960891Subject:Software engineering
Abstract/Summary:PDF Full Text Request
In the past several decades, the computer science has extended to all aspects of life, the information explosion triggered the beginning of great social change, and therefore the big data which with a great of value inherent has caused widespread concern. Graph theory which for analyze the relationship between the big data set is the typical issue of the big data problems. BFS algorithm as one of these important problems has been widely applied in many areas, such as semiconductor designing, artificial intelligence and social networks. However, the graph theory problem is a typical data intensive applications. So the traditional microprocessor is difficult to meets the need of storage space and network communication in dealing such issues. Because of the stream processor carries a low power consumption and a high performance, it has important significance that study for the accelerator processor architecture in basis of PCIe interface applied in the big data problems, and the research of the PCIe interface is an integral part of the BFS algorithm accelerator. Therefore, this paper use the BFS algorithm accelerator as the research platform, and studied the design and implementation of PCIe Gen3 DMA transfer interface and the application in BFS algorithm.In this paper, we analyzed the PCIe architecture and hierarchical, then designed and implemented the directly memory access(DMA) transfer of PCI Express Gen3 interface and the corresponding drivers and made study mainly in the following four areas:Firstly, as there is no open source of the relative PCIe Gen3 interface in the present situation, we made the in-depth study of the PCIe 3.0 base specification. And then designed and implemented an PCIe Gen3 interface base on the Xilinx Virtex-7 PCIe Gen3 integrated IP core.Secondly, through the in-depth analysis of the Xilinx Virtex-7 PCIe Gen3 integrated IP core's function and the DMA transfer principles, we designed an DMA controller base the above PCIe Gen3 interface, and achieved the purpose of high-speed transmission of data.Thirdly, we studied the way how the PCIe drivers were loaded and initialized under the Linux operating system and the PCIe space source that the Linux operating system could access. What's more, we analyzed the key data structures of the kernel driver and the communication principles between the kernel and the application programs, then designed and implemented the corresponding drivers for the PCIe Gen3 DMA interface.Finally, we analyzed the execution process and data structure of the BFS algorithm, the test data structure and character, designed and implemented an application program which it can transfer data between the host memory and the BFS algorithm accelerator's DDR3 SODIMM, then tested the entire system with this application program in different optimized categories.
Keywords/Search Tags:PCIe, DMA, FPGA, Drivers, BFS
PDF Full Text Request
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