Research On Sliding Window Decoding Algorithm Of Turbo Code And Its Implementation On FPGA

Along with the continuous development of digital communication technology, the bandwidth of the channel is increasing and the speed of data transmission is accelerating,people pay more and more attention to the quality of communication. Channel encoding is a very effective way to improve the reliability of communication, and thus led to a boom in the study of channel encoding. A variety of encoding schemes are proposed, of which the structures are simple, and the performance is good. Turbo code, which utilizes the condition of random coding and decoding of the Shannon noisy channel coding theorem,has obtained the performance near to Shannon theoretic limit and far better than other encoding programs.Turbo code not only has good performance in the high noise environment, but also has strong anti fading and anti-jamming capability.However, there are a large number of exponential operations and multiplication operations in the decoding process of Turbo codes, which makes the decoding algorithm complex and difficult and being hard to implement on hardware platform. In addition, Turbo code belongs to block encoding, which can start decoding only after received a complete frame of data, this not only consumes a lot of storage space especially when the interleaving depth is relatively large, but also cause a lot of decoding delay, and the real-time performance of the system is worse. Therefore, the paper introduces the sliding window algorithm to solve these problems.In this paper, we firstly study the basic concepts of digital communication, channel encoding and Shannon limit, and give a summary of the background of Turbo code to be proposed, the current research and application status of Turbo code. Then, we study the principles and structures of Turbo encoder and decoder, and the features and functions of each component of which. Three kinds of common MAP decoding algorithms, MAP algorithm, Log-MAP algorithm and Max-Log-MAP algorithm are derived in detail.On this basis, I mainly do the following three parts of the work.1. The sliding window algorithm used in Turbo decoding is analyzed in detail, the main principle of the sliding window algorithm and the structure of the sliding window are introduced. By using sliding window technique, the consumption of hardware resource isreduced and the decoding delay is reduced. Finally, we analyze how to achieve the purpose of saving storage resources and shortening the time of decoding.2. Through the C++ programming, Turbo encoder and decoder are implemented, Various factors affecting the decoding performance are compared with the software simulation, the factors are mainly from four angles: encoding parameters, decoding parameters, sliding window algorithm parameters and hardware implementation parameters. Through simulation comparison, the best parameters of the hardware implementation of Turbo encoder and decoder are found out.3. On the basis of the practical engineering application, programming by Verilog language in Quartus II integrated development environment, the designer of the Turbo encoder and decoder on FPGA is implemented. By using Model Sim simulation software the time sequence simulation diagrams of the encoder and decoder modules are obtained,Finally, on the hardware platform, the results are compared with the theoretical values to verify the correctness of the results, and the design of the Turbo encoder and decoder is completed.The first part and the second part are concentrated in the third chapter, the third part is mainly in fourth chapters.