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Design Of USB3.0 High-speed Image Acquisition System Based On FPGA And Research Of Image Features Extraction

Posted on:2016-07-26Degree:MasterType:Thesis
Country:ChinaCandidate:Z ZhangFull Text:PDF
GTID:2348330488474642Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Following the development of modern information technology, the requirements of high image resolution and frame rate are increasing rapidly in the field of image acquisition. While the traditional image acquisition and transmission schemes cannot satisfy the requirements of modern image transmission systems nowadays. High-speed image transmission systems with the advantages of much wider in application and more convenient in operation have become the main trend in the field of image acquisition and transmission. At the same time, the newly available USB3.0 transmission technology provides new solutions and ideas for the implementation of high-speed image transmission systems.The hardware part of the system the author adopts mainly consists of the components as follows: The image sensor OV5640 is used as the image acquisition terminal. Under the condition of 1080 p HD screen definition, the output frame rate of the sensor is up to 30 fps, which will meet the basic requirements of high resolution and high frame rate for modern image transmission systems; One slice of Altera's Cyclone III FPGA EP3C40F484C6 is used as the main control chip, it undertakes the tasks of pre-processing the acquired image and then storing the processed data to high-speed DDR2 SDRAM memory. Combining Cypress' s CYUSB3014 controller which implements USB3.0 protocol with the FPGA, the hardware system can meet the requirement of real time transport for the high-speed image signal. The image data then will be uploaded to the host applications for further processing and display.In the system, software part includes CYUSB3014 firmware and host applications. Adopting the Slave FIFO communication mode, the firmware system transmits the underlying data from hardware to the USB3.0 controller CYUSB3014 through the GPIF II interface. Then the upper applications receive image data and complete the whole transmission process. According to the test and analysis results from application software, the highest stable transmission speed can be 380 MB/s, which can meet the requirements of real-time and high-speed image transmission.This article researchs the image features extraction algorithm on the system platform described above. Through simulating and verificating the performance of the features extraction algorithmon on the MATLAB software,then finishing the extraction of valid featured regions from the images on the hardware platform, we can construct a complete image processing system.
Keywords/Search Tags:FPGA, USB3.0, Slave FIFO, High-speed Transmission, Feature Extraction
PDF Full Text Request
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