Design Of High-speed Data Acquisition And Processing Of Video Based On FPGA And USB3.0

With the wide application of machine vision,and the proposal of Industry 4.0 and "Made in China 2025," higher and higher requirements are also raised in the fields of digital image acquisition,transmission,and processing.The traditional image acquisition card based on ISA interface,PCI interface,serial and parallel interfaces can no longer meet people's demand for high-resolution,real-time image acquisition.A research based on FPGA and USB3.0 high-speed interface,real-time high-speed image acquisition and transmission has become a new hot spot in the field of high-speed image acquisition research at home and abroad.Aiming at requirements of high-speed transmission and real-time transmission,FPGA is used as the core control chip and USB3.0 high-speed interface to coordinate the work of the framework to achieve high frame rate,high resolution,real-time high-speed image acquisition and transmission.Upper computer perform is used for visualization operations and data storage.The overall system adopts the hardware design method after the hardware first,and the system modules are tested and verified by simulation.By implementing the image pre-processing operations such as filtering and edge detection in the FPGA,it is verified that the unique parallel data processing method of FPGA has great advantages in signal and image processing.In the hardware design part of the system,the OV5640 sensor is used as the acquisition front-end.Altera's Cyclone IV E series FPGA is selected as the system control chip,and the DDR2 memory chip is used for data buffering.Cypress' s USB3.0 integrated USB 3.0 chip is used as the data speed interface.This part completes the circuit design of each module and the physical production of the acquisition card PCB.System software design is mainly divided into FPGA logic program part,USB3.0 firmware program part and upper computer application software part.By configuring a "soft core" on the FPGA,the Qsys system completes the configuration and initialization of the OV5640.The data path between FPGA and FX3 is completed by the GPIF II interface.Write the state machine to complete the Slave FIFO timing control,complete the USB3.0 firmware program design and development in Eclipse.The upper computer adopts VS2013 software to design by MFC,so as to complete the overall image acquisition data path and display and save in the upper computer.The overall design achieves the expected requirements,each module function is normal,the USB3.0 transmission speed is stable at 320MB/s,and the image resolution saved by the host computer to the PC hard disk is 1920*1080,which is consistent with the sensor register settings,and the acquisition card image acquisition.The frame rate is 30 fps,and the filtering and edge detection pre-processing meets the requirements.The acquisition system has practical application value and research significance.