Design And Research Of High Speed Data Acquisition Card Based On FPGA

Power line communication(PLC) is a kind of communication mode which takes the power line network as the carrier. The development prospect is broad, but the noise interference greatly affects the quality of PLC. The research of collecting the noise signal of the actual power line channel and evaluating the data in laboratory is of great significance in power line communication.In power line communication environment, the noise characteristic parameters change very quickly, the data acquisition system with high sampling rate is necessary to monitor and measure the changes. With the development of electronic information technology, FPGA has been widely used in the field of data acquisition. It provides a basis for the realization for channel noise data acquisition in PLC. FPGA provides a convenience for the design with numerous I/O interfaces, flexible configuration and integrated IP core.This paper completes the selection of the main chip including FPGA, ADC and DAC. The circuit of the board card and sub card is competed through the EDA software. PCB is drawn by the impedance matching analysis and the LVDS differential line technology. The communication between PC and FPGA is realized by PCI-E bus based on DMA mode. The AD data sampling and storage processing, also with the analog signal reduction are realized by the acquisition system. The feasibility of the system design is verified.