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Design Of High-speed Data Acquisition System Based On FPGA

Posted on:2022-11-08Degree:MasterType:Thesis
Country:ChinaCandidate:Y F TangFull Text:PDF
GTID:2518306773485404Subject:Automation Technology
Abstract/Summary:PDF Full Text Request
In recent years,with the continuous development of the sensor application field,the acquisition and transmission of sensor data is facing the problem of high data acquisition rate and large data transmission.Therefore,designing a data acquisition system with high data acquisition rate and large data transmission capability is of great help to the development and application of new sensors.In this paper,according to the project requirements of cooperative enterprises,a set of high-speed data acquisition system based on FPGA is designed.The whole system is composed of high-speed data acquisition system daughter board,high-speed data acquisition system mother board and host computer.It supports image data acquisition of CMOS image sensors with ultra-high resolution and large target surface,as well as the acquisition of analog signals generated by other sensors.The main hardware design of this system is a 14-layer high-speed data acquisition system mother board and a 6-layer analog signal acquisition daughter board,including a total of 2147 devices,6528 electrical connections,and the highest signal rate is 10.3125 Gbps.Among them,the system mother board is used for receiving,processing,buffering and transmitting the collected data.The multiprocessor system-on-chip integrated FPGA+ARM architecture chip is used as the processor,supplemented by the FPGA as the controller.The main peripherals include 4 DDR4@2400MHz cache chips,100 pairs of LVDS high-speed interfaces and a 10 Gigabit Ethernet optical interface;the analog signal acquisition daughter board is equipped with an analog signal conditioning circuit and an analog-to-digital conversion module.The input analog signal realizes 39 d B dynamic voltage regulation,and can accomplish analog-to-digital conversion with 10-bit resolution at a sampling rate of 5GS/s.In the design process,a combination of theoretical calculation and simulation is adopted to ensure the signal integrity and power integrity of the system hardware and reduce electromagnetic interference.Based on the hardware design of the system,the programmable logic and software design of high-speed data acquisition are also implemented in this paper.The newly designed high-speed data acquisition system can adjust the internal circuit structure of FPGA according to the data acquisition requirements of different sensors,and has certain versatility.In addition to the acquisition of specific sensor signals,it can also provide some reference for the acquisition of radar signals and MRI signals,which has certain social significance.
Keywords/Search Tags:High-speed hardware system design, FPGA, Sensor signal, High-speed data acquisition, Series-parallel conversion
PDF Full Text Request
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