Efficient Implementation Method Of DCT/IDCT Based On VLIW Architecture

DCT(Discrete Cosine Transform) and IDCT(Inverse Discrete Cosine Transform) have been widely used in image and video codec. There are many research results achieved by scholars. The three classic fast algorithms are B.G.Lee algorithm, AAN algorithm and LLM algorithm. These algorithms are focus on the reduction of calculation, especially addition and multiplication. However, what we should consider most is how to take advantage of parallel processing hardware resources in order to suit VLIW(Very Long Instruction Word), in terms of the implementation of DCT/IDCT based on VLIW architecture.In this paper, an efficient DCT/IDCT implementation method on VLIW architecture is presented based on existing fast DCT/IDCT algorithms. Firstly, high-order matrix computation is decomposed into the calculation of 2-order matrix, which can be realized by complex arithmetic. Secondly, the decomposed matrix computation is rewritten with VLIW instruction after transformation for VLIW feature. To reduce register pressure, reusing of packed transform matrix coefficients is also achieved with rational organization of data. With the above steps, the proposed method is more suitable for software pipelining and ILP(Instruction Level Parallelism) is improved. To verify the efficiency, the proposed method is compared with the other two different ones by being implementation on TMS320C6678 DSP based on AVS. Simulation results show that the efficiency of this method can be promoted by nearly 4 times and 50% to 60%, compared with fast algorithm in AVS and existing one based on VLIW respectively.