A High-performance General-purpose Vliw Microprocessor Prototype And Its Storage System Design

High-performance general-propose microprocessor is one of the kernel technologies in the computer industry, so having our own independent design ability is the assurance of the healthy development of our IT industry. It has great strategic influence, and is just our target.At first, this paper reviews the current situation in the general-propose microprocessor designing field. With an analysis and comparison of the two mainstreams, the Post-RISC and VLIW, a conclusion is drawn, VLIW has more benefits than its disadvantages, will be the flow of the tide in the coming future. So we decide to develop a VLIW microprocessor of our own.Secondly, four key problems in VLIW processor design are studied, including how to exploit enough ILP, code compatibility, VLIW formation, and the Cell oriented instruction sets, and then the microarchitecture of the target VLIW microprocessor is decided.Now the emphasis is transferred to the design and implementation of memory system. Before a deep discussing, some basic knowledge is introduced, such as the memory classification and hierarchy, address space, access controlling, cache, memory coherence, and the popular memory system implementation method. Then the archteture of the target memory system is presented and divided into two subsystems, the virtual memory management subsystem and memory access subsystem, according to their function.In the following virtual memory management subsystem design, after analyzing the hardware-software dividing line and cooperation in detail, four key issues of virtual memory manage subsystem design are discussed: the classification of processor operating mode, the partition of virtual space, the access controlling and the design of Control Coprocessor (CCoP). A virtual manage subsystem prototype is then presented.In the memory access subsystem design, on the basis of deeply discussing three kernel problems encountered in cache design, this paper presents a LI Cache model with virtual index and physical tag, using a hardware-based method to solve the synonym problem, and adopting L2 cache' s initiative requesting for the LI cache' s Snoop service to keep the consistency between LI cache and L2 cache, then takes LI data cache as an example to illustrate the LI cache implementation.