Clock Control Unit Of SoC For Dynamic Frequency Conversion

With the rapid development and progress of semiconductor industry and the integrated circuit manufacturing process, the scale of SoC is growing with functional complexity and the volume of SoC is also shrinking. Meanwhile, the requirements of performance and power of SoC are become increasingly evident. Especially for the wide-spreading mobile devices, whose performance and battery life are directly determined by the SoC performance. Therefore, how to reduce power consumption without performance degradation is one of the most challenging issues nowadays.The SoC power optimization, can be carried out from different level such as system level, software level, architecture level, behavior level, register transfer level, gate level and transistor level. There are different parameters which can be optimized at different levels. Actually, it is the most effective and remarkable method to optimize the power consumption issue in system level. For clock synchronization circuits, dynamic power is the main source of system power, while using dynamic power controller is the most effective way to improve utilized efficiency of batteries in system level. According to the state-of-art research, system clock is the major factor affecting the performance and power consumption of SoC. Hence, one of greatest challenges of system level power optimization is to control the system clock effectively.A system clock control methodology which is based on dynamic clock control methodology is investigated in this research, dynamic clock frequency control unit is implemented for low power SoC applications with this methodology. The power control unit can achieve 5 different operating modes of SoC through clock gating. It can switch among operating modes based on the need of performance and power. Simultaneously, by using the self-adaptive dynamic frequency regulation, the workloads and operating time can be simple. According to the changes in system demands and requirements, the operating frequency can be adjusted to a suitable place by calculating the optimal frequency. So the goal of power consumption optimization is achieved. The whole operating process is mainly realized by hardware circuits without any participation of the software, which greatly improves the real-time control of the system clock.In this research, we applied and integrated the power control unit into a low power micro-controller simulation platform which is based on openMSP430 embedded processor. and then we use Verilog Compiled Simulator and Verdi to perform function simulation and verification. After that, Design Compiler and Power Compiler are used for design optimization and power estimation analysis, respectively. The simulation results and power estimation analysis reports show the micro-controller with dynamic power control unit can reduce 1.4%～19.6% total power without any efficiency and performance degradation. This research surely will have certain practical significance and meaning.