| With the development of IC (Integrated Circuit) design technique and semiconductor technology, the dimension and complication of design improve. It is the trend that the single chip can accomplish channel demodulation and audio and video decompression in digital TV receiver. So it is the necessary to improve the efficiency and the reusability of verification based on the character of chip. This thesis studies the design and implementation of digital TV chip hardware verification platform.This thesis firstly introduces the background, the meaning of design and the current status of the related technology, then further study the basic concept of digital TV, the design flow of the hardware board, the verification flow of FPGA design and the software tool of hardware design.Then introduce the requriment of whole verification hardware on digital TV chip and the character and the structure of EP3SL340, which including I/O layout and design principle, interconnect resource, data signal process module and clock network, etc. Then put forward the design theme for digital TV chip hardware verification platform which includes the design method of channel demodulation parts and data decoding parts, it includes memory,audio,veido,MPEG interface,man-mechine interface,configuration interface,clock network and power module. And according to PCB layout and the principle of route, implement the PCB design and manufacture.At last setup a test environment to verify the function of design e and test the performance of design by combining with the actual application, meet the requirement of engineering.This thesis study FPGA hardware verification platform based on Stratix EP3SL340 chip. On which we can develop the related digital TV chip and design the other function and other interface by expanding different application. The hardware board works with stability and reliability, which can accommodate all kind of digital TV interfaces and including memery system,audio system,video system, etc. |
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