Key Technologies Of Embryonics Hardware For Chip Self-repairing In Digital Circuit

Embryonics hardware is part of bio-inspired electronic hardware with flexible reconfigurability and distributed autonomous control capability in unit level of logical circuit,it provides some foundation technologies for the chip self-testing and self-repairing of digital system.Reliabilities of digital systems based on embryonics hardware can be significantly improved in fully autonomous control applications,especially in aviation,aerospace,deep-sea areas and other harsh environments.There are three issues should be settled in engineering application of embryonics hardware on the chip self-repairing digital system,they are the improved hardware architectures,the effective methods to improve reliabilities and the useful tools for comprehensive estimate and verification.There are serious deficiencies except for the first area by now.The malpractices of low resource utilization and incomprehensive autonomous control restrict the development of embryonics hardware.After studying of the key technologies of embryonics hardware,this thesis proposes a new architecture model with hierarchical self-repairing strategy,gives a simplified design method of cell circuit and finds a ways to select the optimum parameters target for the reliability.The main contributions of the thesis are:1.A three-layer model is proposed which contains the system layer,the tissue layer and the cell layer.Against for the serious complexity increases of cell circuit with the array size increase in the traditional two-layer model,a new tissue layer is put forward and a block strategy is used in the system layer to lower the size of the cell array in self-repairing.To solve the defect of high cell redundant in the traditional four-layer model,the new self-repairing strategy of no fault tolerance in system layer is used.The system layer is consists of blocks by logical function,which are named electronic tissues.The high system reliability is guaranteed by the intracellular molecular module fault-tolerant.2.A new hierarchical self-repairing strategy is adopted.In cell layer: each molecular module is fault self-tested and the self-repairing process is combined with the cell eliminate strategy in tissue layer.In tissue layer: the fault-cell reuse strategy is used to improve the insufficiency of the cells without permanent failures which have been removed.All the transient faults and part of permanent faults can be repaired.3.To improve the self-healing capability and simplify the cell circuit,this thesis proposes a series of self-testing structures and self-repairing structures.The methods of circuit implementation and correctness verification are also researched.Detail contents as follows:? A multi-function logic module is proposed,which can be easily configured for a variety of commonly used logic.The allocative efficiency of cell array can be significantly improved.This thesis gives two structures of LUT circular self-testing and dual module comparison self-testing to reduce the complexity of self-testing circuit,both of them can test only the units which affect the outputs of LUT.? The configuration memory is designed on shift registers,so the redundancy of configuration data is dramatically reduced.The thesis also proposes the memory self-testing method and gives the corresponded circuit structure in cell layer.Combined with the self-repairing process in tissue layer,all the memory transient faults and part of permanent faults can be repaired.This study achieves the breakthrough in configuration memory self-repairing research.? Adapt to the tissue layer self-repairing strategy,a new control module is designed and implemented,and the correctness of control process is verified.? The interconnect module is implemented with a separation method according to its control characteristics.The switch block locates inside the cell for its work needs to be configured,while the additional wiring circuit which don't require configuration is designed independently with pure combinational circuit.The new structure of interconnect module has the advantages of high-speed rewiring,small cell size and low failure rate.4.The application design process of embryonics hardware is always accompanied by the actual cases "specific person carries out the specific tasks in the target chip,the design methods and design capability are determined by the designer".How to find the optimization method to improve the reliability is the main research work of this thesis.The cell area is extracted as the main parameter to indicate the circuit changes of molecular module with different approaches.The traditional reliability model based on the typical architecture and self-repairing strategy of embryonic hardware is amended.By reliability analysis,following the change rule of reliability under different self-repairing strategies,different particle sizes of cell and different cell layout structures,the best reliability-based design parameters can be selected.5.The physical experiment platform which can be used to demonstrate the correctness of embryonics cellular array is developed.