Simulation And Verification Of Xilinx FPGA Based 1394 Bus Analyzer

With the rapid development of microelectronic technology, computing technology and communicating technology, the speed and reliability are more and more important during data transfer. IEEE 1394 is a serial interface bus standard designing for high-speed communications and real-time data transfer. IEEE 1394 has been widely used in the computer peripheral devices, digital imaging, real-time monitor, multi-media and high-volume storage. Besides, the serial bus also seeing vast potential in industry control system, network interconnection, aerospace and aviation prospect. By the advantages of high transfer speed, easy to use, plug-and-play compliant, supporting asynchronous and isochronous transaction, expansibility and relative low cost, IEEE 1394 become the ideal choice for high-speed reliable data transfer bus between high speed devices.The task of this paper is to design an IEEE 1394 monitor device which can real-time react to the bus status and record the data packets transferring in the bus. The status information and data recorded can be used to analyze the whole devices that connected within the bus, helping bus designer solve hidden problems as soon as possible.This paper introduced the IEEE 1394 serial bus architecture and the period partition. Using FPGA from Xilinx corporation, IEEE 1394 link layer chip and physical layer chip from TI, USB chip from Cypress and SDRAM chip from Micron, formulate a RTL level design of the IEEE 1394 bus analyzer. Finally verify the design with verilog HDL language, the verification result shows the design can fulfill desire functions.