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The Design And Implementation Of A Multiple Modes Viterbi Decoder

Posted on:2014-04-23Degree:MasterType:Thesis
Country:ChinaCandidate:X Q WuFull Text:PDF
GTID:2308330479979199Subject:Software engineering
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With the development of wireless communication.Channel coding and decoding techniques have been widely stuied.Convolutional code is a common encoding method in channel coding.At present,the most wireless communication system adopt the error correction of channel which convolutional encoder and Viterbi decoder.In this paper,we designed a multi-mode and high performance Viterbi decoder chip, it can support the convolutional encodeing of modern wireless communication system.The contents of this thesis included the following several aspects:According to the function of Viterbi decoder,we design the structure of the chip and the detailed report of each function module.In the process of updating the state metrics,we need to calculate the cost of chip resources and processing velocity.We used 2 cascade ACS method which is based on radix-4 algorithm when the Viterbi chip was designed.This method solved the contradiction between state metrics calculation speed and calculation. So that,Viterbi decoder can supports multiple modes.State metric storage management is a difficult point in the process of state metrice calculateing.In this paper,we used block storage structure to solve the problem.In the process of updating the state metrics, ACS module need to prevent the calculation of path metrics overflowed.In this paper,we adopt the modulo normalization method.This method is effective to reduce the consumption of hardware,while increasing the speed of the path metric calculation.When we design the Survivor-path Memory Management module,we used the improved one-pointer method which is proposed in this paper.This method overcomes the problem of memorizer which need to be divide into many block with different constraint length.It makes that SMU module can support the multiple constraint lengthBuild a Viterbi decoder verification platform. Finally, the thesis validated-this Viterbi system. The verification results shows that the decoder has met- the requi rements of the functional requirements. Also high coverage proved the adequacy of the verification.Through the post layout simulation and the actual chip testing, the function of Viterbi decoder is correct and The capabilities reach the standards.Viterbi decoder meet the requirements of high speed and multi function...
Keywords/Search Tags:convolutional code, Viterbi decoder, State metric update, Survivor-path Memory Management
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