Research And Implementation Of The Key Technologies In Viterbi Decoder VLSI Design

Convolutional Code and Viterbi algorithm is extensively used in digital communication as an effective way of forward correcting, which can consumedly enhance the validity and reliability of the information transmission. In this paper, the Viterbi algorithm as well as its various improvements is penetrated with, and the key technologies together with the performance character of Viterbi decoder' s VLSI implementation are introduced. We find that there are some difficulties in selecting designing parameters and technologies, deducing the needed memory space and decoding latency in the Viterbi decoder using big constraint length.In this paper, a software simulator which can be highly configured is designed. The process of convolutional encoding, communicating channel and Viterbi decoding will be simulated by the software simulator. By comparing the performance of the decoder with different parameters and implementing methods, we optimize the selection of them.In addition, rooted in further research in Viterbi algorithm and some related technologies, we optimize the design of "add-compare-select" unit. A special algorithm named "probability trace back" is developed based on our research of the existed trace back algorithms and some Stat. By using it, the decoding latency as well as the memory space in the trace back component is reduced.This paper implements a Viterbi decoder by using the selected parameters, optimized "add-compare-select" unit and the "probability trace back" algorithm which can be used in the DRM (Digital Radio Mondiale) system. The process of its designing and performance evaluating is given in the end.