The Design And Implementation Of Viterbi-Decoder Coprocessor(VCP) In YHFT-DSP

YHFT-EX is a high perfomance DSP which is designed by the YHFT-DSP Design Group of Computer School of National University of Defense Technology, and it is optimized based on the 3G(Third-Generation) standard. 3G demands for higher voice-quality and lower bit-error-rate (BER). It's become a problem for the traditional implement of forward error correction (FEC) which handing all FEC in software which in general eats up a great deal of DSP capacity. YHFT-EX has integrated Viterbi and Turbo hardware accelerators, and the two coprocessors handle the majority of the FEC decoding computations. This method greatly improved the speed of decoding while freeing more DSP capacity for other functions.In general, the implement of FEC using Convolutional codes or Turbo codes in 3G. This article studied the algorithm of Viterbi, and developed the high performance VCP coprocessor based on the demand of 3G and the architecture of DSP.ACS is one of the main part of Viterbi decoder, which affects the performance of the decoder. Traditional Cascase ACS architecture has more delay units and poorer configurable. Our design separated the original cascade architecture to two phases based on the constraint. This new cascade ACS architecture sovled the above problems and has the merit of easy to implement.The method of decoding output is "partly register-exchange, wholly traceback ", which has the merits of register exchange which run faster and the merits of traceback which wasted lower power. Also, the structure corresponds to the new cascade ACS structure which has two phases and offsets the speed and power.The article explained the design and implemention of each module, analyzed the read-write conflict caused by the differential of constraints in cascade ACS structure, the address attemperation of state metric memory in each symbol period, and the problem caused by the differential of traceback modes and so on. In the end, VCP has been passed the functional verification and FPGA emulation. The BER performance and code rates is perfect satisfied the Voice-Coding demand in 3G standard.